View LV4126W_1993051.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

any and all sanyo products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft? control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. consult with your sanyo representative nearest you before using any sanyo products described or contained herein in such applications. sanyo assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all sanyo products described or contained herein. monolithic linear ic 82198rm (ot) no.6001-1/21 sanyo electric co.,ltd. semiconductor bussiness headquarters tokyo office tokyo bldg., 1-10, 1 chome, ueno, taito-ku, tokyo, 110-8534 japan LV4126W ordering number : en6001 overview the LV4126W is a lcd panel driver for use in low- temperature polysilicon tft lcds that integrates an rgb decoder, a driver, and a timing controller in a single chip. this ic is manufactured in bi-cmos process and supports the following color lcd panels: alp202/ alp210 (2 inches), alp208 (1.8 inches), and alp304 (2.8 inches) functions analog block: rgb decoder/driver digital block: timing generatorr features supports ntsc/pal standard supports composite, y/c, and y/color difference inputs built-in bpf, trap, and dl circuits sharpness function dual point g correction circuit pre-charge circuit r and b outputs delay time correction circuit (supports up and down and right and left inversions) polarity reverse circuit external rgb input supported line inversion supported supports ac drive for the lcd panel during no signal serial bus for mode setting and electric vr package sqfp-64 plastic package package dimensions unit: mm sqfp-64 [LV4126W] sanyo: sqfp64 single-chip lcd panel driver ic (supports the alp202 /304lcd panel)
no.6001- 2 /21 LV4126W electrical characteristics at v cc 1 = 4.5 v, v cc 2 = v cc pcd = 12.0 v, gnd1 = gnd2 = gndpcd = 0 v, v dd = 3.0 v v ss 1 = v ss 2 = 0 v, and ta = 25 c dc characteristics parameter symbol conditions ratings unit min typ max [current characteristics] icc11 input sig4 to (a) and sig2 (0 db) to (b). composite input 22 29 35 ma current drain: v cc 1 icc12 measure the icc1 current. y/c input 21 28 34 ma 4.5v system icc13 input sig4 to (a), (d), and (e). y/color difference 18 23 28 ma measure the icc1 current. input current drain: v cc 2 icc2 input sig4 to (a) and sig2 (0 db) to (b). 5.0 7.0 9.0 ma 12v system measure the icc2 current. current drain: v dd idd1 input sig4 to (a) and sig2 (0 db) to (b). alp202 mode 4.5 6.0 7.5 ma mos circuit blocks idd2 measure the idd current. alp304 mode 5.5 7.5 9.5 ma [digital block input and output characteristics] input current ii1 input pins with built-in pull-up resistors * 1 v in = v ss ?4 ?0 ?45 a ii2 input pins with built-in pull-down resistors * 2 v in = v dd 24 60 145 a high-level output voltage v oh 1 ioh = ? ma * 3 v dd ?0.2 v low-level output voltage v ol 1 iol = 1 ma * 3 0.3 v cko pin high-level output voltage v oh 2 ioh = ? ma 0.5v dd v cko pin low-level output voltage v ol 2 iol = 3 ma 0.5v dd v rpd pin high-level output voltage v oh 3 ioh = ?.5 ma v dd ?1.2 v rpd pin low-level output voltage v ol 3 ioh = 0.7 ma 1.0 v rpd pin output off leakage current ioff in the high-impedance state with v out = v ss or v dd . ?0 40 a input voltage threshold (high) vtdh input pins * 1 , * 2 0.7v dd v input voltage threshold (low) vtdl input pins * 1 , * 2 0.3v dd v notes: 1. input pins with built-in pull-up resistors: vdin, csh, csv, sclk, data, and load 2. input pins with built-in pull-down resistors: panel and test 3. output pins other than cko and rpd: xsth, sth, ckh2, ckh1, pcg2, pcg1, hd, xstv, stv, ckv2, ckv1, xenb, enb, and vd. specifications maximum ratings at ta = 25 c note * : when mounted on a printed circuit board (30 30 mm, t = 1.6 mm, material: glass/epoxy) operating conditions at ta = 25 c parameter symbol conditions rating units v cc 1 max analog 4.5v system 6 v maximum supply voltage v cc 2 max analog 12v system 14 v v dd max digital system 4.5 v allowable power dissipation pd max with ta 75 c * 350 mv operating temperature topr ?5 to +75 c storage temperature tstg ?0 to +125 c input pin voltage vina analog input pins ?.3 to v cc 1 v vind digital input pins ?.3 to v dd +0.3 v parameter symbol conditions rating units v cc 1 analog 4.5v system 4.5 v recommended supply voltage v cc 2 analog 12v system 12.0 v v dd digital system 3.0 v v cc 1op analog 4.5v system 4.25 to 5.25 v operating supply voltage range v cc 2op analog 12v system 11 to 13.5 v v dd op digital system 2.7 to 3.6 v
no.6001- 3 /21 LV4126W ac characteristics (1) when the t41, t44, and t46 outputs are measured at the noninverted outputs. parameter symbol conditions ratings unit min typ max [luminance signal system] contrast characteristics (typ.) gcnttp input sig4 to (a) and measure the ratio of the t44 output 13 17 21 db amplitude (white - black) to the input amplitude. contrast characteristics (min.) gcntmn input sig4 to (a) and measure the ratio of the t44 output ? ? ? db amplitude (white - black) to the input amplitude. maximum video gain gv input sig4 to (a) and measure the ratio of the t44 output 19 22 25 db amplitude (white - black) to the input amplitude. [luminance signal frequency characteristics] y/c input fcyyc 5.0 take the t44 output amplitude with sig7 (0 db, no burst, fcycmn 100 khz) input to (a) as 0 db. modify the input frequency 2.5 mhz composite input ntsc and determine the frequency such that the output is down fcycmp 2.5 pal ? db. gshp1x take the t44 output amplitude with sig7 max 12 16 image quality adjustment (100 khz) input to (a) as 0 db. determine range 1 (y/c input) gshp1n the ratio of the output amplitude with a min 0 2 db 2.5-mhz sig7 input. gshp3x take the t44 output amplitude with sig7 max 6 10 image quality adjustment (100 khz) input to (a) as 0 db. determine the range 3 (composite input) gshp3n ratio of the output amplitude with a 2.0-mhz min ? 3 db sig7 input. input sig2 (0 db) to (a) and using a spectrum analyzer, measure the 3.58 and 4.43 mhz components in the input and chrominance signal leakage crleky in t44. let ? clk be that difference. use that value to 30 mv determine crleky from the following formula: crleky = 150 mv 10 d clk/20 [luminance signal input to output delay] y/c input tdyyc 250 350 450 ns input sig5 (vl = 150 mv) to (a).measure the delay time tdycmn between a rising edge in the input and the corresponding 500 600 700 ns composite input ntsc rising edge in the t44 noninverted output. pal tdycmp 500 600 700 ns [color difference signal system] input sig5 (vl = 150 mv) to (a) and sig1 (0 db, 100 khz, gexcmx no burst) to (d). let vc0 be the t41 output amplitude +4 +6 db (100 khz) when col = 128. let vc2 be the t41 output color difference input color amplitude (100 khz) when col = 0. let vc1 be the t41 adjustment output amplitude (100 khz) when sig1 is set to -10 db and gexcmn col = 255. then calculate the following formulas. ?5 ?1 db gexcmx = 20log (vc1/vc0) +10 gexcmn = 20log (vc2/vc0) input sig5 (vl = 150 mv) to (a) and sig1 (0 db, 100 khz, no burst) to (d) and (e). color difference balance vexcbl let vb be the t41 output amplitude (100 khz), and let vr 0.85 1 1.15 be the t46 output amplitude (100 khz). calculate vexcbl = vr/vb. continued on next page.
parameter symbol conditions ratings unit min typ max [chrominance signal system] ntsc ? 0 +3 acc amplitude characteristics 1 acc1 pal ? 0 +3 db vtsc ? 0 +3 acc amplitude characteristics 2 acc2 pal ? 0 +3 ntsc 500 apc pull-in range fapc hz pal 500 no.6001- 4 /21 LV4126W continued from preceding page parameter symbol conditions ratings unit min typ max [color difference signal system] gexrmx +2 +3 db color difference input balance adjustment r gexrmn ? ?.5 db gexbmx ? ?.5 db color difference input balance adjustment b gexbmn +2 +3 db vexgbn 0.21 0.24 0.27 g-y matrix characteristics (ntsc) vexgrn 0.46 0.51 0.56 vexgrp 0.17 0.19 0.21 g-y matrix characteristics (pal) vexgrp 0.46 0.51 0.56 continued on next page. input sig5 (vl = 150 mv) to (a) and sig1 (? db, 100 khz, no burst) to (d) and (e). when tint = 128, let vr0 be the t46 output amplitude (100 khz) and let vb0 be the t41 output amplitude (100 khz). when tint = 255, let vr1 be the t46 output amplitude and let vb1 be the t41 output amplitude. when tint = 0, let vr2 be the t46 output amplitude and let vb2 be the t41 output amplitude. then calculate the following formulas. gexrmx = 20log (vr1/vr0) gexrmn = 20log (vr2/vr0) gexbmx = 20log (vb1/vb0) gexbmn = 20log (vb2/vb0) input sig5 (vl = 150 mv) to (a) and sig1 (0 db, 100 khz, no burst) to (d). let vexb be the t41 output amplitude (100 khz) and vexbg be the t44 output amplitude (100 khz).calculate vexgb = vexbg/vexb. input sig5 (vl = 150 mv) to (a) and sig1 (0 db, 100 khz, no burst) to (e). let vexr be the t46 output amplitude (100 khz) and vexrg be the t44 output amplitude (100 khz). calculate vexgr = vexrg/vexr. input sig5 (vl = 150 mv) to (a) and sig1 (0 db, 100 khz, no burst) to (e). let vexr be the t46 output amplitude (100 khz) and vexrg be the t44 output amplitude (100 khz). calculate vexgr = vexrg/vexr. input sig5 (vl = 150 mv) to (a) and sig1 (0 db, 100 khz, no burst) to (d). let vexb be the t41 output amplitude (100 khz) and vexbg be the t44 output amplitude (100 khz).calculate vexgb = vexbg/vexb. ac characteristics (2) input sig5 (vl = 150 mv) to (a), and to (b), input sig2 (0 db, 3.58 mhz, burst/chrominance phase = 180 , and also 4.43 mhz, burst/chrominance phase = 135 ). measure the t44 output amplitude. modify the sig2 burst frequency, until the killer is released. measure the frequency f1 that appears in the t41 output. ntsc f1 = 3579545 hz pal f1 = 4433619 hz input sig5 (vl = 150 mv) to (a), and to (b), input sig2 (0, +6, and ?0 db, 3.58 mhz, burst/chrominance phase = 180 , and also 4.43 mhz, burst/chrominance phase = 135 ). measure the t53 output amplitude, and let v0, v1, and v2 correspond to 0 db, +6 db, and ?0 db, respectively. acc1 = 20log (v1/v0) acc2 = 20log (v2/v0)
no.6001- 5 /21 LV4126W continued from preceding page parameter symbol conditions ratings unit min typ max [chrominance signal system] color adjustment characteristics (maximum) gcolmx +4 +6 db color adjustment characteristics (minimum) gcolmn ?0 ?5 db tint adjustment range (maximum) tntmx ?0 ?0 deg tint adjustment range (minimum) tntmn 30 40 deg ackn ntsc ?6 30 db killer operating input level ackp pal ?3 ?7 db vrbn 0.53 0.63 0.73 demodulator output amplitude ratio (ntsc) vgbn 0.25 0.32 0.39 q rbn 99 109 119 deg demodulator output phase difference (ntsc) q gbn 230 242 254 deg vrbp 0.65 0.75 0.85 demodulator output amplitude ratio (pal) vgbp 0.33 0.40 0.47 q rbp 80 90 100 deg demodulator output phase difference (pal) q gbp 232 244 256 deg input sig5 (vl = 150 mv) to (a), and input sig2 (0 db, burst/chrominance phase = 180 ) to (b). let v0, v1, and v2 be the chrominance signal amplitude when col = 128, col = 255, and col = 0, respectively. calculate gcolmx = 20log (v1/v0), and gcolmn = 20log (v2/v0). input sig5 (vl = 150 mv) to (a), and input sig2 (0 db, with a variable burst/chrominance phase) to (b). let q 0, q 1, and q 2 be the phases when the t41 output amplitude is minimum when tint = 128, tint = 255, and tint = 0, respectively. calculate tntmx = q 1 ? q 0, and tntmn = q 2 ? q 0. input sig5 (vl = 150 mv) to (a), and to (b), input sig2 (with a variable level, burst/chrominance phase = 180 , and also burst/chrominance phase = 135 ). measure the t41 output amplitude. gradually lower the sig3 level (amplitude) until the killer function operates and measure that level. input sig5 (vl = 150 mv) to (a), and input sig3 (0 db) to (b). modify the chrominance signal phase, let vb be the maximum amplitude of the t41 chrominance demodulated signal, let vg be the maximum amplitude of the t44 chrominance demodulated signal, and let vr be the maximum amplitude of the t46 chrominance demodulated signal calculate vrbn = vr/vb and vgbn = vg/vb. input sig5 (vl = 150 mv) to (a), and input sig3 (0 db) to (b). modify the chrominance signal phase, let q b be the phase at the maximum amplitude of the t41 chrominance demodulated signal, let q g be the phase at the maximum amplitude of the t44 chrominance demodulated signal, and let q r be the phase at the maximum amplitude of the t46 chrominance demodulated signal. calculate q rbn = q r ? q b and q gbn = q g ? q b. input sig5 (vl = 150 mv) to (a), and input sig3 (0 db) to (b). modify the chrominance signal phase, let vb be the maximum amplitude of the t41 chrominance demodulated signal, let vg be the maximum amplitude of the t44 chrominance demodulated signal, and let vr be the maximum amplitude of the t46 chrominance demodulated signal calculate vrbp = vr/vb and vgbp = vg/vb. input sig5 (vl = 150 mv) to (a), and input sig3 (0 db) to (b). modify the chrominance signal phase, let q b be the phase at the maximum amplitude of the t41 chrominance demodulated signal, let q g be the phase at the maximum amplitude of the t44 chrominance demodulated signal, and let q r be the phase at the maximum amplitude of the t46 chrominance demodulated signal. calculate q rbp = q r ? q b and q gbp = q g ? q b.
no.6001- 6 /21 LV4126W parameter symbol conditions ratings unit min typ max [rgb signal and pcd output systems] rgb signal and pcd output input sig5 (vl = 0 mv) to (a), adjust the bright parameter dc voltage vout with the serial bus data so that t44 is 9 vp-p, and measure 5.85 6.00 6.15 v the dc voltages on t39, t41, t44, and t46. rgb signal and pcd output determine the maximum value of the differences in the dc voltage difference ? vout measured values of vout in the previous item for t39, t41, 0 100 mv t44, and t46. vlimmx 9.0 vpp rgb signal and pcd output color difference input balance vlimmn 5.2 vpp brtmx 9.0 vpp brightness variation brtmn 4.0 vpp pcd variation pcdmx 9.0 vpp pcdmn 3 vpp sub-brightness variation sbbrt 2.0 3.0 v input sig4 to (a) and determine the level difference between rgb inter-signal gain difference ? grgb the largest and the smallest of the noninverted output ?.5 0 0.5 db amplitudes (white - black) for t41, t44, and t46. rgb inverted/noninverted gain input sig4 to (a) and determine the difference between difference ? ginv the inverted output amplitude and the noninverted output ?.5 0 0.5 db amplitude (white - black) for t41, t44, and t46. rgb inter-signal black level input sig4 to (a) and determine the difference between the potential difference ? vbl highest and lowest black levels in the inverted and 300 mv noninverted t41, t44, and t46 outputs. g g 1 23.0 26.0 29.0 db gamma gain g g 2 12.0 15.0 18.0 db g g 3 18.0 21.0 25.0 db v g 1mn 0 ire gamma 1 adjustment range v g 1mx 70 ire v g 2mn 100 ire gamma 2 adjustment range v g 2mx 30 ire tpcdh the transition time for a load of 8000 pf and an amplitude of 2.5 s pcd transition time 9 v p-p. tpcdl tpcdh: for rising edges. tpcdl: for falling edges. 2.5 s input sig3 to (a), and measure the maximum value (vlimmx) and minimum value (vlimmn) of the voltage range (black - black) over which the black limiter operates when v54 is varied for t39, t41, t44, and t46. measure vlimmx when v54 = 0 v, and measure vlimmn when v54 = 4.5 v. input sig5 (vl = 0 mv) to (a) and set brt to 0. measure the t41, t44, and t46 outputs (black - black). input sig5 (vl = 0 mv) to (a) and measure the t39 output (black - black) when p-brt is set to 255. input sig5 (vl = 0 mv) to (a) and measure the t44 output (black - black) with respect to the t41 and t46 outputs (black - black) when r-brt = b-brt = 0, and when r-brt = b-brt = 255. input sig8 to (a), adjust the t44 inverted output black level to be 1.5 v with brt, and adjust the amplitude (black - white) to be 3.5 v with cont. measure vg1, vg2, and vg3 and calculate the following formulas. g g 1 = 20log (vg1/0.0357) g g 2 = 20log (vg2/0.0357) g g 3 = 20log (vg3/0.0357) input sig8 to (a) and set the t44 output (black - black) to 9 v p-p with the bright adjustment. read the gamma gain transition point at the input signal ire level when g 1 = 0 and when g 1 = 255. v g 1mn is when g 1 = 0, and v g 1mx is when g 1 = 255. input sig8 to (a) and set the t44 output (black - black) to 9 v p-p with the bright adjustment. read the gamma gain transition point at the input signal ire level when g 2 = 0 and when g 2 = 255. v g 2mn is when g 2 = 0, and v g 2mx is when g 2 = 255. input sig5 (vl = 0 mv) to (a) and set brt to 255. measure the t41, t44, and t46 outputs (black - black). input sig5 (vl = 0 mv) to (a) and measure the t39 output (black - black) when p-brt is set to 0. ac characteristics (3)
no.6001- 7 /21 LV4126W parameter symbol conditions ratings unit min typ max [filter characteristics] ntsc 1.50 mhz ?5 ?0 db bandpass filter attenuation atbpf pal 2.00 mhz ?5 ?0 db ntsc 5.50 mhz ? ? db pal 6.80 mhz ? ? db atrapn ntsc ?0 ?0 db trap attenuation atrapp pal ?0 ?0 db r-y and b-y low-pass filter demlpf 0.7 0.9 1.1 mhz [sync separator circuit and tg system] input synchronizing signal amplitude sensitivity wssep 2.0 s sync separator circuit input sensitivity vssep 40 60 mv tdsyl 430 630 830 ns sync separator circuit output delay tdsyh 4.7 5.0 5.3 s hplln ntsc 500 hz horizontal pull-in range hpllp pal 500 hz continued on next page. input sig5 (vl = 0 mv) to (a) and sig1 (0 db) to (b). take the t53 chrominance amplitude when the center frequency (3.58 and 4.43 mhz) is input to be 0 db, and measure the t53 output attenuation for the frequencies listed at the right. input sig7 (0 db, 3.58 and 4.43 mhz) to (a) and measure the t44 output with a spectrum analyzer. taking the t44 amplitude in y/c mode to be 0 db, determine the attenuation in composite input mode. input sig5 (vl = 150 mv) to (a) and sig2 (0 db, 3.58 mhz + 100 khz) to (b). take the t44 output 100 khz component am plitude at this time to be 0 db, and determine the frequency at which the output beat component is reduced by 3 db when the sig2 frequency is increased from 3.58 mhz. input sig5 (vl = 0 mv, vs = 143 mv, variable ws) to (a) and verify synchronization with the t23 hd output. determine the value of ws at the point synchronization with the t23 hd output is lost when the sig5 ws is gradually made narrower starting at 4.7 s. input sig5 (vl = 0 mv, ws = 4.7 s, variable vs) to (a) and verify synchronization with the t23 hd output. determine the value of vs at the point synchronization with the t23 hd output is lost when the sig5 vs is gradually reduced starting at 143 mv. input sig5 (vl = 0 mv, ws = 4.7 s, vs = 143 mv) to (a) and measure the delay time with respect to the t12 rpd output. here, tdsyl is the delay from the fall of the input hsync signal to the fall of the t12 rpd output, and tdsyh is the delay from the rise of the input hsync signal to the rise of the t12 rpd output. input sig5 (vl = 0 mv, ws = 4.7 s, vs = 143 mv, variable horizontal frequency) to (a) and verify synchronization withthe t23 hd output. determine the frequency fh at which synchronization is achieved when the sig5 horizontal frequency is varied starting from the state where i/o synchronization is lost. calculate hplln = fh ?15734 and hpllp = fh ?15625. ac characteristics (4)
no.6001- 8 /21 LV4126W continued from preceding page parameter symbol conditions ratings unit min typ max [external i/o characteristics] vtextb 0.8 1 1.2 v external rgb input threshold voltage vtextw 1.8 2.0 2.2 v tdexth 70 100 120 ns external rgb input to output transmission delay time tdextl 70 100 120 ns external rgb input to output input sig5 (vl = 0 mv) to (a) and sig6 (vl = 1.7 v) to (c) blanking level difference extbk and measure the difference from the t41, t44, and t46 0 v black levels. external rgb input to output input sig5 (vl = 0 mv) to (a) and sig6 (vl = 2.7 v) to (c) white level difference extwt and measure the difference from the t41, t44, and t46 3.5 v black levels. [digital block output characteristics] output transition time ttlh input sig5 (vl = 0 mv) to (a). use a load of 30 pf. 30 ns (for the pins * 3 .) tthl 30 ns cross point time difference ? t input sig5 (vl = 0 mv) to (a). use a load of 30 pf. 10 ns ckh1/ckh2 ckh duty dtyhc input sig5 (vl = 0 mv) to (a). use a load of 30 pf. 47 50 53 % measure the ckh1 and ckh2 duty. input sig5 (vl = 0 mv) to (a) and sig6 (variable vl) to (c). let vextb be the voltage at which the t41, t44, and t46 outputs reach the black level when the amplitude (vl) is raised starting at 0 v. then, let vtextw be the voltage at which the outputs reach the white level as the amplitude is increased further. input sig5 (vl = 0 mv) to (a) and sig6 (vl = 3 v) to (c). measure tdexth, the delay in the t41, t44, and t46 output rise, and tdextl, the delay in the output fall time.
no.6001- 9 /21 LV4126W block diagram serial bus i/f
no.6001- 10 /21 LV4126W pin no. pin pin voltage i/o input handling pin function equivalent circuit 1 trap 2 gnd1 3 syncin 4 h.filout 5 s.sepin external trap circuit connection. chrominance components are excluded by a series lc circuit (inductor and capacitor) connected to ground. (this pin is left open in y/color difference input mode.) 0 v analog 4.5v system ground 1.5 v sync separator circuit low- pass filter input. the standard input signal level is 0.5 vp-p (sync tip to 100% white level). the input should be provided with low impedance (under 75 ). 2.3 v sync separator circuit low- pass filter output 1.0 v sync separator circuit input. input the waveform that results from passing the input signal through the sync separator circuit low-pass filter to this pin. analog block pin functions units (capacitors: f, resistors: ) continued on next page. i o i
no.6001- 11 /21 LV4126W continued from preceding page. units (capacitors: f, resistors: ) pin no. pin pin voltage i/o input handling pin function equivalent circuit 6 extr 37 fbpcd 38 gndpcd 39 pcd 40 v cc pcd continued on next page. these pins are used to input external digital signals. there are two threshold levels: vth1 (about 1.0 v) and vth2 (about 2.0 v). if one of the rgb signal exceeds vth1, then all of the rgb outputs are set to the black level, and the output only goes to the white level when the input exceeds vth2. 2.5 v feedback circuit smoothing capacitor connections. these circuits are used to control the dc levels in the rgb and pcd outputs. since these are high- impedance circuits, capacitors with low leakage must be used. 0 v ground for the pcd circuit 6.0 v pcd output 12 v 12v system power supply used for the pcd circuit. use the same potential as used for v cc 2. 7 extg 8 extb 42 fbb 45 fbg 47 fbr i o o
no.6001- 12 /21 LV4126W continued from preceding page. units (capacitors: f, resistors: ) pin no. pin pin voltage i/o input handling pin function equivalent circuit 41 bout 43 gnd2 48 v cc 2 49 v cc 1 50 sig center continued on next page. 6.0 v rgb signal outputs 0 v analog 12v system ground 12 v analog 12v system power supply 4.5 v analog 4.5v power supply 6.0 v rgb output dc level setting 44 gout 46 rout o i
no.6001- 13 /21 LV4126W continued from preceding page. units (capacitors: f, resistors: ) pin no. pin pin voltage i/o input handling pin function equivalent circuit 51 byin 53 cout 54 blklim 55 apc 56 vxoout continued on next page. these pins are used for the color difference signal inputs in y/color difference input mode. the clamp level in this mpde is 2.8 v. in other modes, the signal from pin 53 is input to these pins. in those modes the pin voltage will be about 1.6 v. the standard input signal level is 0.3 v p-p for a 75% color bar signal. 1.6 v provides the acc output. (this pin is left open in y/color difference input mode.) sets the rgb output amplitude (black to black) clipping level 2.7 v apc filter connection. (this pin is left open in y/color difference input mode.) 2.9 v vxo output (this pin is left open in y/color difference input mode.) 52 ryin i o i o o
no.6001- 14 /21 LV4126W pin no. pin pin voltage i/o input handling pin function equivalent circuit 57 vxoin 58 vreg 59 cin 60 start-up 61 y-in continued on next page. 3.2 v vxo input (this pin is left open in y/color difference input mode.) 3.6 v regulator output connect a 1- f or larger external capacitor to this pin. inputs the video signal if a composite input is used. inputs the chrominance signal if separate y and c signals are used. (this pin is left open in y/color difference input mode.) connection for the capacitor that determines the time that the rgb outputs are held at the black level when power is first applied. connect this pin to v cc 1 through a resistor of about 22 k if this function is not used. (threshold level: 2.3 v) 3.1 v luminance (y) signal input. the standard input signal level is 0.5 vp-p (from the sync tip to the 100% white level.) the input should be provided with low impedance (under 75 ). continued from preceding page. units (capacitors: f, resistors: ) i o i i i
no.6001- 15 /21 LV4126W pin no. pin pin voltage i/o input handling pin function equivalent circuit 62 pict 63 foadj 64 pwrst used to adjustment the luminance signal frequency characteristics. outlines are emphasized as the voltage is increased. 3.0 v filter adjustment resistor connection. the reference current is created by a 15-k resistor connected to ground. reset pin for the ic internal cmos circuits. a capacitor should normally be connected between this pin and ground. (threshold level: 2.2 v) continued from preceding page. units (capacitors: f, resistors: ) i o i
no.6001- 16 /21 LV4126W pin no. pin pin voltage i/o input handling pin function equivalent circuit 9 10 11 33 34 35 vdin csh csv sclk data load 24 36 panel test 12 rpd 13 v ss 1 14 15 cki cko continued on next page. v dd these input pins include internal pull-up resistors v ss 2 these input pins include internal pull-down resistors phase comparator output (tristate) vco circuit digital system ground oscillator cell input and output digital block pin functions units (capacitors: f, resistors: ) i i o i/o h l (l: pulled down, h: pulled up)
no.6001- 17 /21 LV4126W pin no. pin pin voltage i/o input handling pin function equivalent circuit 16 v dd 17 18 19 20 21 22 23 25 26 27 28 29 30 32 xsth sth ckh2 ckh1 pcg2 pcg1 hd xstv stv ckv2 ckv1 xenb enb vd 31 v ss 2 digital system power supply digital block outputs 0 v digital system ground continued from preceding page. units (capacitors: f, resistors: ) o
no.6001- 18 /21 LV4126W electrical characteristics test circuit units (capacitors: f, resistors: ) notes: 1. the crystal used is the kinseki, ltd. cx-5f frequency deviation: under 30 ppm, frequency temperature characteristics: 30 ppm ntsc: 3.579545 mhz pal: 4.433619 mhz 2. variable capacitance diode: 1t369 (sony corporation) 3. inductance: 10 h in alp202 mode, or 3.9 h in alp304 mode. 4. trap (tdk) ntsc: nlt4532-s3r6b pal: nlt4532-s4r4 5. resistor tolerance: 2%, temperature coefficient: under 200 ppm. 220 pf
no.6001- 19 /21 LV4126W measurement waveforms sg no. waveform sig1 sig2 sig3 sig4 sig5 continued on next page. sine wave video signal; with or without burst. (variable amplitude, variable frequency) ? the value at the left is 0 db. chrominance signal: burst and chrominance frequency (3.579545 or 4.433619 mhz) variable chrominance phase, variable burst frequency ? the value at the left is 0 db. five-step staircase wave the vl amplitude is variable. variable vs: 143 mv unless otherwise specified. variable ws: 4.7 s unless otherwise specified. variable fh: ntsc: 15.734 khz or pal: 15.625 khz unless otherwise specified. 0.15 v
no.6001- 20 /21 LV4126W continued from preceding page sg no. waveform sig6 sig7 sig8 sig9 variable frequency 2t pulse the vl amplitude is variable. variable vs: 143 mv unless otherwise specified. variable ws: 4.7 s unless otherwise specified. variable fh: ntsc: 15.734 khz or pal: 15.625 khz unless otherwise specified. sync timing the vl amplitude is variable. ten-step staircase wave
ps no. 6001- 21 /21 LV4126W this catalog provides information as of august, 1998. specifications and information herein are subject to change without notice. specifications of any and all sanyo products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer? products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer? products or equipment. sanyo electric co., ltd. strives to supply high-quality high-reliability products. however, any and all semiconductor products fail with some probability. it is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. when designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. in the event that any and all sanyo products described or contained herein fall under strategic products (including services) controlled under the foreign exchange and foreign trade control law of japan, such products must not be exported without obtaining export license from the ministry of international trade and industry in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of sanyo electric co., ltd. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equipment, refer to the ?elivery specification for the sanyo product that you intend to use. information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. sanyo believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties.

▲Up To Search▲

Price & Availability of LV4126W

	To Download LV4126W Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .